It feels like I’ve been battling scheduler lockups forever.
My scheduler bug is definitely due to missing some timer interrupts but it’s hard to tell exactly what’s going on as I think this only happens when booted via SBI. So the SBI firmware code manages setting up the timer, and I don’t know maybe the SBI interface is just not intended for the way I’m using it or maybe I’ve missed some other necessary initialisation on secondary cores.
There is a fallback plan if I can’t get it working, which would be like a legacy mode that maxes out each CPU core in a hot loop with no interrupts. This mode would probably work okay on modern hardware and would be responsive enough in a multi-core setup but might not be useful outside of demos (would waste battery power on devices).
In the longer term I need to finish the PLIC code to get all the interrupts set up properly, my short term approach will depend on whether I make a breakthrough soon or whether I get frustrated and revert to simpler ways of doing things.
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